M74HC573B1R中文资料

M74HC573B1R中文资料

1/12

July 2001s

HIGH SPEED:

t PD = 13ns (TYP .) at V CC = 6V s

LOW POWER DISSIPATION:I CC = 4µA(MAX.) at T A =25°C s

HIGH NOISE IMMUNITY:

V NIH = V NIL = 28 % V CC (MIN.)

s

SYMMETRICAL OUTPUT IMPEDANCE:|I OH | = I OL = 6mA (MIN)

s

BALANCED PROPAGATION DELAYS:t PLH ≅ t PHL

s

WIDE OPERATING VOLTAGE RANGE:V CC (OPR) = 2V to 6V

s

PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 573

DESCRIPTION

The M74HC573 is an high speed CMOS OCTAL LATCH WITH 3-STATE OUTPUTS fabricated with silicon gate C 2MOS technology.

This 8-BIT D-Type latches is controlled by a latch enable input (LE) and output enable input (OE).While the LE input is held at a high level, the Q outputs will follow the data input precisely. When LE is taken low, the Q outputs will be latched precisely at the logic level of D input data.

While the OE input is at low level, the eight outputs will be in a normal logic state (high or low logic level) and while is at high level the outputs will be in a high impedance state.

The 3-State output configuration and the wide choice of outline make bus organized system simple.

All inputs are equipped with protection circuits against static discharge and transient excess voltage.

M74HC573

OCTAL D-TYPE LATCH

WITH 3 STATE OUTPUT NON INVERTING

M74HC573B1R中文资料

M74HC573B1R中文资料

PIN CONNECTION AND IEC LOGIC SYMBOLS

ORDER CODES

PACKAGE TUBE T & R

DIP M74HC573B1R SOP M74HC573M1R

M74HC573RM13TR TSSOP

M74HC573TTR

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