A New Self-checking Sum-bit Duplicated Carry-select Adder

In this paper the first code-disjoint totally selfchecking carry-select adder is proposed. The adder blocks are fast ripple adders with a single NAND-gate delay for carry-propagation per cell. In every adder block both the sum-bits and the corresponding in

ANewSelf-checkingSum-bitDuplicatedCarry-selectAdder

E.S.Sogomonyan D.MarienfeldV.OcheretnijM.Gössel

UniversityofPotsdam,DepartmentofComputerScience,

FaultTolerantComputingGroup,

14439Potsdam,Germany E-mail:egor|dmarien|vitalij|mgoessel@cs.uni-potsdam.de AbstractTheXOR-sumofthepropagatesignalswhichisdeter- Inthispaperthe rstcode-disjointtotallyself-minedby63XOR-gatesandwhichisequaltotheXOR-sum checkingcarry-selectadderisproposed.Theadderblocksp(a⊕b)ofthebitsofoperandsaandb,iscomparedwith arefastrippleadderswithasingleNAND-gatedelayfortheXOR-sumpa⊕pboftheinputparitybitspaandpb. carry-propagationpercell.IneveryadderblockboththeThuswesave64XOR-gates.

sum-bits andthecorrespondinginvertedsum-bitsaresimul-Aslongasnoerroroccurswehavepa⊕pb=p(a⊕b).

implemented.TheparityoftheinputoperandstaneouslyTheadderblocksofthe64bitself-checkingcode- againsttheXOR-sumofthepropagatesignals.ischeckeddisjointcarry-selectadderofFig.1areinourdesignof areaandmaximaldelayaredeterminedbytheFor64bitsblocksizesof8,8,12,12,12and12bits.Theadder http://www.wendangwang.com-SYNOPSYSblocksimplementbesidesthecorrespondingsum-bitsalsoparedto a64bitcarry-selectadderwithouterrordetectiontheinvertedsum-bits.Thecarry-outsignalsoftheblocksthedelayareduplicated.Allthepropagatesignalswhicharealready ofthemostsigni cantsum-bitdoesnotincrease.Theareacheckedbycomparingp(a⊕b)withpa⊕pbareonlyde- is170%ofa64bitcarry-selectadder(withouterrordetectionandnotcode-disjoint).terminedoncebythe”PropagateGenerator”forthedupli-

catedblocksandwesave56·3+8=176XOR-gates.The 1.IntroductionadderblocksaredenotedbySDB.

The rstThe rstblockSDB1(8)whichisnotduplicatedcom- self-checkingcarry-selectadderwasdescribedin[1],whereatimeredundantsolutionwasproposed.Re-putesfromtheoperandbitsa[0,7]=a0,...,a7,b[0,7]=

centlyin[2,3]self-checkingcarry-selectaddersarede-b0,...,b7andfromthepropagatesignalsp[0,7]=p0,...,p7

scribedwhicharenotcode-disjoint.Inthispaperwepro-thesum-bitss[0,7]=s0,...,s7,theinvertedsum-bits[0,7]=

posethe rstcode-disjointcompletelyself-checkingcarry-0,...,7andtheduplicatedcarriesc71andc72oftheblock.

selectadder.ThesecondblockSDB02(8)computesfortheconstant carry-insignal0fromtheoperandbitsa[8,15]=a8,...,a15,2.ProposedSum-bitDuplicatedCarry-select b[8,15]=b8,...,b15andfromthepropagatesignalsp[8,15]=

00Adderp8,...,p15thesum-bitss0[8,15]=s8,...,s15,theinverted 000sum-bits0InFig.1theproposedself-checkingcode-disjointcarry-[8,15]=8,...,15andtheduplicatedcarriesc151 selectadderfor64bitsisshown.Theinputoperandsandc0152oftheblock. a=a0,...,a63andb=b0,...,b63aresupposedtobepa-ThesecondduplicatedblockSDB12(8)computesforthe rityencodedwiththeparitybitspa=a0⊕...⊕a63andconstantcarry-insignal1fromtheoperandbitsa[8,15]= pb=b0⊕...⊕b63respectively.a8,...,a15,b[8,15]=b8,...,b15andfromthepropagatesig- 11Fromtheinputoperandsthepropagatesignalsp0=a0⊕nalsp[8,15]=p8,...,p15thesum-bitss1[8,15]=s8,...,s15,the a1⊕b1,...,p63=a63⊕b63arederivedonlyonce11b0,p1=invertedsum-bits1[8,15]=8,...,15andtheduplicatedcar-bythe” PropagateGenerator”whichconsistsof64XOR-1riesc1151andc152oftheblock.gates. Ifthecarry-outsignalsc71=c72ofthepreceedingblock ThispaperwassupportedbyaresearchgrantofIntel

SDB1(8)areequalto0(1)themultiplexorsMUXs2and GuestprofessoroftheUniversityofPotsdam

1530-1591/04 $20.00 (c) 2004 IEEE

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